Select Publications
Conference Papers
, 2020, 'Dave: Deriving automatically verilog from English', in Mlcad 2020 Proceedings of the 2020 ACM IEEE Workshop on Machine Learning for CAD, pp. 27 - 32, http://dx.doi.org/10.1145/3380446.3430634
, 2020, 'A compositional approach using Keras for neural networks in real-time systems', in Proceedings of the 2020 Design Automation and Test in Europe Conference and Exhibition Date 2020, pp. 1109 - 1114, http://dx.doi.org/10.23919/DATE48585.2020.9116371
, 2019, 'Securing implantable medical devices with runtime enforcement hardware', in Memocode 2019 17th ACM IEEE International Conference on Formal Methods and Models for System Design, http://dx.doi.org/10.1145/3359986.3361200
, 2019, 'Synthesizing IEC 61499 function blocks to hardware', in Iceic 2019 International Conference on Electronics Information and Communication, http://dx.doi.org/10.23919/ELINFOCOM.2019.8706345
, 2018, 'Synchronous neural networks for cyber-physical systems', in 2018 16th ACM IEEE International Conference on Formal Methods and Models for System Design Memocode 2018, http://dx.doi.org/10.1109/MEMCOD.2018.8556931
, 2018, 'Synchronous neural networks for cyber-physical systems', in PROCEEDINGS OF THE 2018 16TH ACM/IEEE INTERNATIONAL CONFERENCE ON FORMAL METHODS AND MODELS FOR SYSTEM DESIGN (MEMOCODE), IEEE, PEOPLES R CHINA, Beijing, pp. 33 - 42, presented at 16th ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE), PEOPLES R CHINA, Beijing, 15 October 2018 - 18 October 2018
, 2018, 'Faster function blocks for precision timed industrial automation', in Proceedings 2018 IEEE 21st International Symposium on Real Time Computing Isorc 2018, pp. 67 - 74, http://dx.doi.org/10.1109/ISORC.2018.00017
, 2017, 'Simulation of cyber-physical systems using IEC61499', in Memocode 2017 15th ACM IEEE International Conference on Formal Methods and Models for System Design, pp. 136 - 145, http://dx.doi.org/10.1145/3127041.3127052
, 2017, 'A model driven approach for cardiac pacemaker design using a PRET processor', in Proceedings 2017 IEEE 20th International Symposium on Real Time Distributed Computing Isorc 2017, pp. 168 - 175, http://dx.doi.org/10.1109/ISORC.2017.5
, 2016, 'RunSync: A predictable runtime for precision timed automation systems', in Proceedings 2016 IEEE 19th International Symposium on Real Time Distributed Computing Isorc 2016, pp. 116 - 123, http://dx.doi.org/10.1109/ISORC.2016.25
Preprints
, 2025, From CVE Entries to Verifiable Exploits: An Automated Multi-Agent Framework for Reproducing CVEs, http://dx.doi.org/10.48550/arxiv.2509.01835
, 2025, CGP-Tuning: Structure-Aware Soft Prompt Tuning for Code Vulnerability Detection, http://dx.doi.org/10.48550/arxiv.2501.04510
, 2025, Towards LLM-based Root Cause Analysis of Hardware Design Failures, http://dx.doi.org/10.48550/arxiv.2507.06512
, 2025, LASHED: LLMs And Static Hardware Analysis for Early Detection of RTL Bugs, http://arxiv.org/abs/2504.21770v1
, 2025, What's Pulling the Strings? Evaluating Integrity and Attribution in AI Training and Inference through Concept Shift, http://arxiv.org/abs/2504.21042v2
, 2025, Hardware Design and Security Needs Attention: From Survey to Path Forward, http://dx.doi.org/10.48550/arxiv.2504.08854
, 2025, Logic Meets Magic: LLMs Cracking Smart Contract Vulnerabilities, http://arxiv.org/abs/2501.07058v1
, 2024, SoK: Unifying Cybersecurity and Cybersafety of Multimodal Foundation Models with an Information Theory Approach, http://arxiv.org/abs/2411.11195v2
, 2024, Automatically Improving LLM-based Verilog Generation using EDA Tool Feedback, http://dx.doi.org/10.48550/arxiv.2411.11856
, 2024, ARVO: Atlas of Reproducible Vulnerabilities for Open Source Software, http://arxiv.org/abs/2408.02153v1
, 2024, Evaluating LLMs for Hardware Design and Test, http://dx.doi.org/10.48550/arxiv.2405.02326
, 2024, OffRAMPS: An FPGA-based Intermediary for Analysis and Modification of Additive Manufacturing Control Systems, http://dx.doi.org/10.48550/arxiv.2404.15446
, 2024, LLM-aided explanations of EDA synthesis errors, http://dx.doi.org/10.1109/LAD62341.2024.10691721
, 2023, LLMs Cannot Reliably Identify and Reason About Security Vulnerabilities (Yet?): A Comprehensive Evaluation, Framework, and Benchmarks, http://arxiv.org/abs/2312.12575v3
, 2023, AutoChip: Automating HDL Generation Using LLM Feedback, http://arxiv.org/abs/2311.04887v2
, 2023, Towards the Imagenets of ML4EDA, http://dx.doi.org/10.48550/arxiv.2310.10560
, 2023, Are Emily and Greg Still More Employable than Lakisha and Jamal? Investigating Algorithmic Hiring Bias in the Era of ChatGPT, http://arxiv.org/abs/2310.05135v1
, 2023, Dcc --help: Generating Context-Aware Compiler Error Explanations with Large Language Models, http://arxiv.org/abs/2308.11873v2
, 2023, VeriGen: A Large Language Model for Verilog Code Generation, http://arxiv.org/abs/2308.00708v1
, 2023, (Security) Assertions by Large Language Models, http://dx.doi.org/10.1109/TIFS.2024.3372809
, 2023, FLAG: Finding Line Anomalies (in code) with Generative AI, http://arxiv.org/abs/2306.12643v1
, 2023, Chip-Chat: Challenges and Opportunities in Conversational Hardware Design, http://dx.doi.org/10.1109/MLCAD58807.2023.10299874
, 2023, REMaQE: Reverse Engineering Math Equations from Executables, http://dx.doi.org/10.48550/arxiv.2305.06902
, 2023, Fixing Hardware Security Bugs with Large Language Models, http://dx.doi.org/10.1109/TIFS.2024.3374558
, 2023, A survey of Digital Manufacturing Hardware and Software Trojans, http://arxiv.org/abs/2301.10336v1
, 2022, Benchmarking Large Language Models for Automated Verilog RTL Code Generation, http://arxiv.org/abs/2212.11140v1
, 2022, Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design, http://dx.doi.org/10.1145/3508352.3549369
, 2022, Lost at C: A User Study on the Security Implications of Large Language Model Code Assistants, http://arxiv.org/abs/2208.09727v4
, 2022, High-Level Approaches to Hardware Security: A Tutorial, http://dx.doi.org/10.1145/3577200
, 2022, Pop Quiz! Can a Large Language Model Help With Reverse Engineering?, http://arxiv.org/abs/2202.01142v1
, 2021, Examining Zero-Shot Vulnerability Repair with Large Language Models, http://arxiv.org/abs/2112.02125v3
, 2021, Needle in a Haystack: Detecting Subtle Malicious Edits to Additive Manufacturing G-code Files, http://dx.doi.org/10.1109/LES.2021.3129108
, 2021, Runtime Interchange for Adaptive Re-use of Intelligent Cyber-Physical System Controllers, http://arxiv.org/abs/2110.01974v1
, 2021, Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions, http://arxiv.org/abs/2108.09293v3
, 2021, FLAW3D: A Trojan-based Cyber Attack on the Physical Outcomes of Additive Manufacturing, http://arxiv.org/abs/2104.09562v1
, 2020, DAVE: Deriving Automatically Verilog from English, http://dx.doi.org/10.1145/3380446.3430634
, 2020, Designing Neural Networks for Real-Time Systems, http://dx.doi.org/10.1109/LES.2020.3009910
Other
, 2022, Formal Methods for the Security of Medical Devices1, http://dx.doi.org/10.1002/9781119743187.ch3